1. Introduction & Motivation (1 mark)

Contiguous memory allocation suffers from external fragmentation and rigid partitioning. Paging eliminates external fragmentation by allowing a process’s logical address space to be non-contiguous in physical memory .

2. Basic Concept (1 mark)

• Logical memory is divided into fixed-size blocks called pages.
• Physical memory is divided into equal-sized frames (same size as pages).
• A process of n pages is loaded into any n free frames; pages need not occupy contiguous frames .

3. Address Translation Scheme (2 marks)

1. Logical address from the CPU:
   • Page number (p) – high-order bits
   • Offset (d) – low-order bits
2. Page table (one per process) maps each page number to a frame number (f).
3. Physical address = (frame number × page size) + offset.

4. Hardware Support & TLB (1 mark)

• Page‐Table Base Register (PTBR): Points to the process’s page table in memory.
• Associative‐Lookup (TLB): Caches recent page→frame mappings to avoid a full table lookup on every memory reference.

5. Page Table Entry (PTE) Fields (1 mark)